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Webinar: FPGA and ASIC Design: Challenges, Evolution, and Sovereignty in the Era of Heterogeneous Integration

Webinar: FPGA and ASIC Design: Challenges, Evolution, and Sovereignty in the Era of Heterogeneous Integration

On May 19, Ceit is organizing a webinar to analyze the evolution of FPGA and ASIC technologies, the role of open architectures such as RISC V, and the impact of heterogeneous integration and chiplets as a response to the limits of traditional scalability.

06 | 05 | 2026

The design of advanced electronic systems is facing increasingly demanding requirements in terms of real-time determinism, energy efficiency, functional integration, and reliability, especially in critical applications such as defense, aerospace, transport, energy, or edge computing.

On May 19, Ceit is organizing a webinar to analyze the evolution of FPGA and ASIC technologies, the role of open architectures such as RISC V, and the impact of heterogeneous integration and chiplets as a response to the limits of traditional scalability. Based on in-house experience and capabilities, the session will address:

  • How to decide between FPGA and ASIC based on cost, volume, power consumption, and performance.
  • FPGA → ASIC migration strategies focused on efficiency and technological sovereignty.
  • Design of fault- and radiation-tolerant systems.
  • Development of RISC V platforms for advanced embedded systems.
  • Current trends in heterogeneous integration.

 

Agenda
10:05 Current challenges in electronic design: FPGA vs ASIC
10:20 RISC V: open and fault-tolerant designs
10:40 Heterogeneous integration and chiplets
10:50 Closing and Q&A session

Speakers

 

Webinar

 

Who is it for?

R&D managers, electronic engineers, technology leaders, and industrial decision-makers.

Reserve your spot! Register here.


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